PCB, also known as Printed Circuit Board, can achieve circuit connection and functional implementation between electronic components, and is an important component of power circuit design. Today, this article will introduce the basic rules of PCB board layout and wiring.
1、 Basic rules for component layout
1. Layout according to circuit modules, and related circuits that achieve the same function are called a module. The components in the circuit module should adopt the principle of nearest concentration, and digital circuits and analog circuits should be separated;
2. Elements and components shall not be mounted within 1.27mm around non installation holes such as positioning holes and standard holes, and components shall not be mounted within 3.5mm (for M2.5) and 4mm (for M3) around installation holes such as screws;
3. Avoid placing through holes underneath components such as resistors, inductors (plugins), and electrolytic capacitors installed horizontally to prevent short circuits between the through holes and the component housing after wave soldering;
The distance between the outer side of the component and the edge of the board is 5mm;
5. The distance between the outer side of the solder pad for mounting components and the outer side of adjacent plug-in components is greater than 2mm;
6. Metal shell components and metal parts (shielding boxes, etc.) should not collide with other components, and should not be tightly attached to printed wires or solder pads. The distance between them should be greater than 2mm. The dimension between the outer side of positioning holes, fastener installation holes, elliptical holes, and other square holes in the board and the board edge is greater than 3mm;
7. Heating elements should not be adjacent to wires and thermal sensitive elements; High thermal devices should be evenly distributed;
8. Power sockets should be arranged around the printed circuit board as much as possible, and the wiring terminals of the power sockets and their connected busbars should be arranged on the same side. Special attention should be paid not to arrange power sockets and other welding connectors between the connectors, in order to facilitate the welding of these sockets and connectors, as well as the design and wiring of power cables. The spacing between power sockets and welding connectors should be considered to facilitate the insertion and removal of power plugs;
9. Layout of other components:
All IC components should be aligned on one side, with clear polarity markings for polar components. Polarity markings on the same printed circuit board should not exceed two directions. When two directions appear, the two directions should be perpendicular to each other;
10. The wiring on the board should be appropriately dense. When the difference in density is too large, a mesh of copper foil should be filled, with a mesh size greater than 8mil (or 0.2mm);
11. There should be no through holes on the SMT pad to prevent solder paste loss and component solder failure. Important signal lines are not allowed to pass through the socket pins;
12. Single sided alignment of SMT, consistent character direction, and consistent packaging direction;
13. Devices with polarity should maintain consistency in the direction of polarity markings on the same board as much as possible.
2、 Component wiring rules
1. Within the designated wiring area ≤ 1mm from the edge of the PCB board, as well as within 1mm around the installation holes, wiring is prohibited;
2. The power cord should be as wide as possible and not less than 18 mils; The signal line width should not be less than 12 mils; The CPU input and output lines should not be less than 10mil (or 8mil); The spacing between lines shall not be less than 10mil;
3. Normal through-hole not less than 30mil;
4. Dual in line insertion: 60mil solder pad, 40mil aperture;
1/4W resistor: 51 * 55mil (0805 gauge); When inserting directly, the solder pad is 62mil and the aperture is 42mil;
Unlimited capacitance: 51 * 55mil (0805 surface mount); When inserting directly, the solder pad is 50mil and the aperture is 28mil;
5. Note that the power and ground wires should be as radial as possible, and the signal wires should not have looping.
How to improve anti-interference ability and electromagnetic compatibility?
How to improve anti-interference ability and electromagnetic compatibility when developing electronic products with processors?
1. The following systems need to pay special attention to anti electromagnetic interference:
(1) A system with a microcontroller clock frequency that is particularly high and a bus cycle that is particularly fast.
(2) The system contains high-power, high current drive circuits, such as spark generating relays, high current switches, etc.
(3) A system that includes weak analog signal circuits and high-precision A/D conversion circuits.
2. To increase the system’s ability to resist electromagnetic interference, the following measures are taken:
(1) Choose a microcontroller with low frequency:
Choosing a microcontroller with a low external clock frequency can effectively reduce noise and improve the system’s anti-interference ability. Square waves and sine waves of the same frequency have much more high-frequency components than sine waves. Although the amplitude of the high-frequency component of a square wave is smaller than that of the fundamental wave, the higher the frequency, the more likely it is to be emitted as a noise source. The most influential high-frequency noise generated by microcontrollers is approximately three times the clock frequency.
(2) Reduce distortion in signal transmission
The microcontroller is mainly manufactured using high-speed CMOS technology. The static input current of the signal input terminal is about 1mA, the input capacitance is about 10PF, and the input impedance is quite high. The output terminals of high-speed CMOS circuits have considerable load capacity, that is, a considerable output value. When the output terminal of a gate is led to the input terminal with a relatively high input impedance through a long line, the reflection problem is very serious, which can cause signal distortion and increase system noise. When TPD>Tr, it becomes a transmission line problem that must consider signal reflection, impedance matching, and other issues.
The delay time of the signal on the printed circuit board is related to the characteristic impedance of the leads, that is, to the dielectric constant of the printed circuit board material. It can be roughly assumed that the transmission speed of signals through the leads of printed circuit boards is between 1/3 and 1/2 of the speed of light. The Tr (standard delay time) of commonly used logic telephone components in systems composed of microcontrollers is between 3 and 18ns.
On a printed circuit board, the signal passes through a 7W resistor and a 25cm long lead, with a delay time of approximately 4-20ns on the line. That is to say, the shorter the lead of the signal on the printed circuit, the better, and the longest should not exceed 25cm. And the number of through holes should also be as small as possible, preferably not more than 2.
When the rise time of the signal is faster than the delay time of the signal, it should be processed according to fast electronics. At this point, impedance matching of the transmission line should be considered. For signal transmission between integrated blocks on a printed circuit board, the situation of Td>Trd should be avoided. The larger the printed circuit board, the slower the system speed.
Summarize a rule for printed circuit board design using the following conclusion:
The signal is transmitted on the printed board, and its delay time should not be greater than the nominal delay time of the device used.
(3) Reduce the interactive interference between signal lines:
A step signal with rise time Tr at point A is transmitted to terminal B through lead AB. The delay time of the signal on line AB is Td. At point D, due to the forward transmission of the signal from point A, the reflection of the signal after reaching point B and the delay of line AB, a page pulse signal with a width of Tr will be induced after Td time. At point C, due to the transmission and reflection of the signal on AB, a positive pulse signal with a width twice the delay time of the signal on line AB, that is, 2Td, will be induced. This is the interactive interference between signals. The strength of the interference signal is related to the di/at of the signal at point C and the distance between the lines. When the two signal lines are not very long, what is seen on AB is actually the superposition of two pulses.
Microcontrollers manufactured with CMOS technology have high input impedance, high noise, and high noise tolerance. The superposition of 100 to 200mv noise on digital circuits does not affect its operation. If line AB in the figure is an analog signal, this interference becomes intolerable. For example, if the printed circuit board is a four-layer board, one of which is a large-area ground, or a double-sided board, and the opposite side of the signal line is a large-area ground, the cross-interference between signals will become smaller. The reason is that a large area of ground reduces the characteristic impedance of the signal line, and the reflection of the signal at the D end is greatly reduced. The characteristic impedance is inversely proportional to the square of the dielectric constant of the medium between the signal line and the ground, and directly proportional to the natural logarithm of the thickness of the medium. If the AB line is an analog signal, to avoid the interference of the digital circuit signal line CD to AB, there must be a large area of ground below the AB line, and the distance from the AB line to the CD line should be greater than 2 to 3 times the distance between the AB line and the ground. A partial shielding ground can be used, and ground wires are placed on the left and right sides of the lead on the side with the lead.
(4) Reduce the noise from the power supply
While the power supply provides energy to the system, it also adds noise to the power supply it supplies. The reset line, interrupt line, and other control lines of the microcontroller in the circuit are most susceptible to interference from external noise. Strong interference on the power grid enters the circuit through the power supply. Even in battery-powered systems, the battery itself has high-frequency noise. Analog signals in analog circuits cannot withstand interference from the power supply.
(5) Pay attention to the high-frequency characteristics of printed circuit boards and components
Under high frequency conditions, the distributed inductance and capacitance of the leads, vias, resistors, capacitors, and connectors on the printed circuit board cannot be ignored. The distributed inductance of the capacitor cannot be ignored, and the distributed capacitance of the inductor cannot be ignored. The resistance produces reflection of high-frequency signals, and the distributed capacitance of the lead will work. When the length is greater than 1/20 of the corresponding wavelength of the noise frequency, the antenna effect will occur, and the noise will be emitted outward through the lead.
The vias of the printed circuit board cause a capacitance of approximately 0.6pF.
The packaging material of an integrated circuit itself introduces a 2 to 6 pf capacitance.
A connector on a circuit board has a distributed inductance of 520nH. A dual-in-line 24-pin integrated circuit socket introduces a distributed inductance of 4 to 18nH.
These small distribution parameters are negligible for this line of microcontroller systems at lower frequencies; special attention must be paid to high-speed systems.
(6) Component layout should be reasonably partitioned
The position of components arranged on the printed circuit board must fully consider the issue of anti-electromagnetic interference. One of the principles is that the leads between components should be as short as possible. In terms of layout, the three parts of the analog signal part, the high-speed digital circuit part, and the noise source part (such as relays, high-current switches, etc.) should be reasonably separated to minimize signal coupling between each other.
G Handle the ground wire:
On the printed circuit board, the power and ground wires are the most important. The most important means to overcome electromagnetic interference is grounding.
For double-sided panels, the ground wire layout is particularly particular. By using the single-point grounding method, the power supply and ground are connected to the printed circuit board from both ends of the power supply. There is one contact for the power supply and one contact for the ground. On the printed circuit board, there must be multiple return ground wires, which will all converge on the contact point that returns the power supply, which is the so-called single-point grounding. The so-called separation of analog ground, digital ground, and high-power device ground means that the wiring is separated, and finally they are all gathered at this ground point. When connecting to signals other than the printed circuit board, shielded cables are usually used. For high frequency and digital signals, shielded cables are grounded at both ends. For shielded cables used for low-frequency analog signals, it is best to ground one end.
Circuits that are very sensitive to noise and interference or circuits that are particularly prone to high-frequency noise should be shielded with metal covers.
(7) Make good use of decoupling capacitors.
A good high-frequency decoupling capacitor can remove high-frequency components up to 1GHZ. Ceramic chip capacitors or multilayer ceramic capacitors have better high-frequency characteristics. When designing a printed circuit board, a decoupling capacitor must be added between the power supply and ground of each integrated circuit. The decoupling capacitor has two functions: on the one hand, it is the energy storage capacitor of the integrated circuit, which provides and absorbs the charging and discharging energy at the moment when the integrated circuit opens and closes; on the other hand, it bypasses the high-frequency noise of the device. The typical decoupling capacitor in digital circuits is 0.1uf. The decoupling capacitor has a distributed inductance of 5nH. Its parallel resonance frequency is about 7MHz, which means that it has a good decoupling effect on noise below 10MHz and above 40MHz. Noise has almost no effect.
1uf, 10uf capacitors, the parallel resonance frequency is above 20MHz, and the effect of removing high-frequency noise is better. Where the power enters the printed board and a 1uf or 10uf de-high frequency capacitor is often advantageous, even battery powered systems require this capacitor.
For every 10 or so integrated circuits, a charge and discharge capacitor, or storage and discharge capacitor, is added. The capacitor size can be 10uf. It is best not to use electrolytic capacitors. Electrolytic capacitors are rolled up with two layers of polyurethane film. This rolled structure behaves as an inductor at high frequencies. It is best to use bile capacitors or polycarbonate capacitors.
The selection of the decoupling capacitor value is not strict and can be calculated according to C=1/f; that is, 0.1uf is used for 10MHz. For a system composed of a microcontroller, it can be between 0.1 and 0.01uf.
3. Some experience in reducing noise and electromagnetic interference.
(1) If low-speed chips can be used, high-speed chips are not needed. High-speed chips are used in key places.
(2) A resistor can be connected in series to reduce the upper and lower edge jump rate of the control circuit.
(3) Try to provide some form of damping for relays, etc.
(4) Use the lowest frequency clock that meets system requirements.
(5) The clock generator should be as close as possible to the device using the clock. The quartz crystal oscillator shell must be grounded.
(6) Encircle the clock area with a ground wire and keep the clock wire as short as possible.
(7) Keep the I/O drive circuit as close to the edge of the printed board as possible and let it leave the printed board as soon as possible. The signals entering the printed circuit board must be filtered, and the signals coming from high-noise areas must also be filtered. At the same time, series terminal resistors must be used to reduce signal reflection.
(8) The useless end of MCD should be connected to high, or grounded, or defined as an output end. The end of the integrated circuit that should be connected to power ground should be connected, and should not be left floating.
(9) The input terminal of the unused gate circuit should not be left floating. The positive input terminal of the unused op amp should be connected to the ground, and the negative input terminal should be connected to the output terminal.
(10) Printed boards should use 45-degree fold lines instead of 90-degree fold lines to reduce the external emission and coupling of high-frequency signals.
(11) The printed board is divided according to frequency and current switching characteristics, and the distance between noisy components and non-noise components should be further away.
(12) Use single-point power supply and single-point grounding for single-panel and double-panel panels. The power cord and ground wire should be as thick as possible. If it is affordable, use multi-layer boards to reduce the inductance of the power supply and ground.
(13) Clock, bus, and chip select signals should be kept away from I/O lines and connectors.
(14) Analog voltage input lines and reference voltage terminals should be kept as far away from digital circuit signal lines as possible, especially clocks.
(15) For A/D devices, it is better to unify the digital part and the analog part than to cross.
(16) The clock line perpendicular to the I/O line has less interference than the parallel I/O line, and the clock component pins are far away from the I/O cable.
(17) The component pins should be as short as possible and the decoupling capacitor pins should be as short as possible.
(18) The key lines should be as thick as possible, and protective grounds should be added on both sides. High-speed lines should be short and straight.
(19) Noise-sensitive lines should not be parallel to high-current, high-speed switching lines.
(20) Do not route traces under quartz crystals or devices that are sensitive to noise.
(21) Do not form a current loop around weak signal circuits and low-frequency circuits.
(22) Any signal should not form a loop. If it is unavoidable, make the loop area as small as possible.
(23) One decoupling capacitor per integrated circuit. A small high-frequency bypass capacitor must be added next to each electrolytic capacitor.
(24) Use large-capacity tantalum capacitors or polycrystalline capacitors instead of electrolytic capacitors as circuit charging and discharging energy storage capacitors. When using tubular capacitors, the case must be grounded.
